As an inverter device for operating an alternating current motor with high efficiency, a circuit having a switching element (IGBT element, etc.) and a reflux diode (FWD) set to be parallel is used in an equivalent circuit of one phase amount of an inverter shown in FIG. 26 (e.g., U.S. Pat. No. 5,915,179). More particularly, in FIG. 26, switching elements Q1, Q2 are connected in series between an electric power source and the ground, and reflux diodes (Df1, Df2) externally attached are respectively connected to the respective switching elements (Q1, Q2) in parallel. A load electric current is flowed by turning-on one switching element Q1 (see FIG. 27). When the switching element Q1 is turned off from this state, a free wheel electric current is flowed through the reflux diode Df2 (see FIG. 27). Further, when the switching element Q1 is turned on from this state, a recovery electric current of the reflux diode Df2 is flowed.
A device of low loss is required in the switching elements Q1, Q2 and the reflux diodes Df1, Df2 to reduce loss of the inverter circuit.
IGBT has been used as the switching elements Q1, Q2 at middle and high withstand voltages of 100 volts or more. However, the development of super junction type MOS is advanced from this requirement of low loss formation.
On the other hand, reductions in loss of the reflux electric current shown in FIG. 27 and the recovery electric current are required as the reflux diodes Df1, Df2. PN junction of silicon (Si) is used at the middle and high withstand voltages of 100 volts or more. However, a Schottky barrier diode (SBD) is ideal to reduce a forward voltage and reduce recovery (reduce carrier accumulation), and high withstand voltage formation is expected.
U.S. Pat. No. 5,915,179 proposes a structure in which power MOS and the Schottky barrier diode (SBD) are adjacently integrated on one chip and are electrically connected in parallel.
Further, JP-A-2002-76370 proposes a structure in which the Schottky barrier diode (SBD) is formed in a super junction substrate and is formed by silicon (Si) so as to withstand high voltage.
In U.S. Pat. No. 5,915,179, when the Schottky barrier diode is formed in an N− layer of silicon (Si), it is impossible to realize that the reduction of the forward voltage and the high withstand voltage formation are reconciled. Therefore, a problem exists in that no integration with a high withstand voltage power MOS transistor can be performed. Further, no Schottky barrier diode can be integrated without increasing an area of the power MOS transistor.
Further, in JP-A-2002-76370, the MOS transistor and this Schottky barrier diode (SBD) are separate parts as a free wheel diode when an inverter system is formed. Therefore, it is large-sized and there is a difficulty in mounting.